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Beirit Harvey

As we look ahead to the Beyond CUDA Summit, the goal is simple. Bring the next set of lessons into the open, live, practical, and just uncomfortable enough to be useful. This blog covers four predictions that held up.

Beyond CUDA 2025 Reality Check: Predictions vs. Proof

Beyond CUDA was created to cut through the noise and talk about what really happens when you’re building AI systems. Real stacks, real constraints, and the tradeoffs you can’t hand-wave away. It’s also here to champion the open-source ecosystem, give builders more real choices, and highlight the people expanding what’s possible across the stack.

Now that 2025 is in the rearview mirror, we finally have enough signal to do a proper “did any of our predictions pan out?” We’re checking: which ideas held up, which timelines were too optimistic, and where reality surprised even the people closest to the work. And as we look ahead to the Beyond CUDA Summit, the goal is simple. Bring the next set of lessons into the open, live, practical, and just uncomfortable enough to be useful. This blog covers four predictions that held up.


Then vs. Now: Beyond CUDA Predictions in 2025


1) Quinton Anthony (Zyphra) — training and inference efficiency across heterogeneous hardware

Summary: Quinton zooms in on the “systems reality” behind modern models: once you care about cost and deployment across phones → laptops → cloud, you can’t treat hardware as an afterthought. He talks about pushing beyond standard transformers (hybrid Mamba/Transformer ideas, weight tying to reduce attention overhead), building custom serving forks for on-device vs. cloud, and why kernel and networking expertise is the real unlock for training economics; especially when moving stacks like Megatron and FlashAttention onto AMD. 

He also flags two big friction points for adoption: unclear FP8 best practices and the need for reproducible comms benchmarks that make Ethernet/RoCE feel as credible as legacy Infiniband.

One prediction that came true (by 2025): “AMD (and other alternatives) will be viable enough that serious teams can’t afford to ignore them.” By 2025, MLPerf Inference results and coverage showed AMD Instinct platforms posting competitive LLM inference performance alongside NVIDIA systems; exactly the kind of public, reproducible signal that makes “at least test AMD” a rational default.

Watch the full conversation on YouTube: How Zyphra is Cutting AI Training Costs with AMD GPUs 


2) Anush Shilongavan (AMD) — “trust in ROCm” + developer-first execution

Summary: Anush frames AMD’s software strategy as a perception shift: from “ROCm has issues” to “ROCm is a platform you can build on for 10 years.” He argues the goal is for software to fade into the background (like not caring what Chrome version you’re on), and that the fastest path there is ruthless execution: better build/test/release discipline, smoother onboarding, and widening support so developers can start on the hardware they actually have… not only datacenter parts. 

He also emphasizes AMD’s advantage as a “cloud-to-client” footprint story, where dev can happen on local devices and scale out in the cloud without switching ecosystems.

One prediction that came true (by 2025): “ROCm (or a ROCm-derived stack) will show up more credibly on client/dev machines.” AMD’s HIP SDK for Windows is now documented as a supported way to bring a subset of the ROCm platform to Windows, and ROCm releases have expanded client GPU coverage; materially reducing the “I can’t even try this” barrier.

Watch the full conversation on YouTube:The AMD Advantage: Anush Elangovan on Building AI Software to Compete with CUDA


Early Registration to the Beyond CUDA Summit 2026

This event is designed for technical practitioners and infra leaders building (or evaluating) heterogeneous AI infrastructure.

Request to Attend → https://luma.com/g03nmrq8


3) Jay Dawani (Leuran Labs) — post–Moore’s Law performance comes from scheduling and runtime

Summary: Jay’s thesis is that kernel-writing alone won’t save us in a heterogeneous, thermally constrained, bandwidth-limited world. He argues performance increasingly comes from global scheduling across memory hierarchies and systems, not just perfect local kernels. So the winning abstraction is a compiler and dynamic runtime that can extract parallelism and place compute near data automatically. 

He’s building for the “millions of PyTorch developers” who need CUDA-class results without becoming low-level performance engineers, and he predicts the real ceiling is energy/land/throughput; forcing architecture and algorithm changes (MoE, reasoning, distillation) to matter as much as hardware.

One prediction that came true (by 2025): “Reasoning and RL/test-time compute will meaningfully reshape workloads and compute demand.” By 2025, mainstream coverage and reporting increasingly centered on “reasoning” models and RL-style approaches as a major direction; matching his claim that new model behaviors would change what infrastructure must optimize for.

Watch the full conversation on YouTube: No Kernels Needed for Speed with Jay Dawani @ Lemurian Labs


4) Greg Damos (ScalarLM) — CUDA wins on software, but training can’t stay locked to one ecosystem at scale

Summary: Greg gives a rare historical through-line: CUDA “won” first by brute performance and then by building a layered ecosystem across many verticals… long before deep learning. He argues AMD is structurally well-positioned because its accelerators descend from GPU DNA (closer mapping from CUDA-like models), and he calls out the real gap as scale-out training software, not single-node inference. 

His core complaint: distributed training frameworks (e.g., Megatron lineage) are effectively NVIDIA-optimized, so porting becomes a permanent tax that burns elite teams. ScalarLM’s mission is a Megatron-inspired, open, third-party training stack that can run efficiently across vendors. He provocatively argues training and inference should be unified because the split is mostly Conway’s Law.

One prediction that came true (by 2025): “The real gap is scale-out training software, and vendor-neutral training at scale carries a real porting and integration tax.” By 2025, the ecosystem made this hard to ignore: the most widely used large-model training stacks were deeply optimized for a single dominant GPU environment, and bringing them to alternative hardware often required dedicated enablement work, including vendor-maintained forks and platform-specific training guides (for example, Megatron-LM enablement on ROCm).

Watch the full conversation on YouTube:AI's Next Chapter: AMD's Big Opportunity with Gregory Diamos @ ScalarLM


Take the Stage at Beyond CUDA Summit

Call for Speakers is now open, and we’re looking for builders, operators, and researchers running real AI workloads, from training runs and fine-tunes to production inference at scale. 

 * Built it? Present it. If you shipped a real workload in 2025 (migration, optimization, or production ops), we want the details… what worked, what broke, and what you’d do differently.
 * Bring numbers, not narratives. Profiling screenshots, throughput curves, failure rates, cost models.
 * We love postmortems. The talks people remember are the ones that clearly explain what failed, why it failed, and what changes resolved it.

Ready to put a real lesson on stage? Submit a talk, nominate a speaker, or suggest a topic, and we’ll help shape it into a session worth showing up for.


Listen to the Full Episodes

If any of these themes hit close to home, go back and listen to the full conversations. We’ve linked the referenced episodes throughout this post, and you can find the rest of the Beyond CUDA library on our YouTube channel as well, with more builders sharing what worked, what broke, and what they learned the hard way. 

Want to stay close to the signal as new episodes drop? Subscribe to the podcast and follow along on YouTube so you don’t miss upcoming guests and topics. And if you’ve lived these lessons firsthand, whether you’re optimizing training, scaling inference, or making new hardware paths real, bring it to the Beyond CUDA Summit.


TensorWave Cloud: Engineered for AI Velocity

TensorWave is the industry’s premier AMD-exclusive cloud provider, delivering memory optimized AI infrastructure for training, fine-tuning and inference. 

Our platform combines the raw computational power of AMD's latest GPU architectures with innovative liquid cooling technology and ultra-high-speed networking, creating an optimized environment for the most demanding AI workloads. From large language model training to real-time inference, TensorWave provides the performance, scalability, and cost-efficiency that modern AI initiatives demand.

Ready to get started? Connect with a sales engineer. 

Beyond CUDA 2025 Reality Check: Predictions vs. Proof

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